Specialist, DFE SoC, Linearization IP
We are looking for a Specialist who develops, simulates, and analyzes linearization algorithms and architectures, e.g. Digital Pre-Distortion (DPD), at Digital Radio Front End (DFE) area.
As a member of DFE SoC organization you will participate to technical studies within your responsibility area writing reviews and relevant feasibility studies. You will also have the responsibilities in specifying, designing, verifying, implementing, reviewing, and documenting Linearization IP blocks and related algorithms and reference models.
Key Responsibilities
- Participate to Linearization IP system design and derive mathematical algorithms, models, and architecture specifications for SoC (ASIC/FPGA/low level SW) development.
- Algorithm development and verification in simulations together with actual RF and power amplifiers measurements in laboratory.
- Prepare and review related specifications for SoC/IP development.
- Proving algorithm functionality with prototypes, which may include design/implementation.
- Support HW/SW bring-up and debugging.
- Cooperate with system engineers, SoC HW/SW development, suppliers and other relevant functions to solve technical issues for quality.
Requirements
- Master’s Degree in Engineering or higher.
- Over 7 years working experience in algorithm or RF PA development.
- Excellent understanding of digital signal processing and related mathematics.
- Excellent understanding of RF power amplifiers, RF measurements and related phenomena.
- Understanding of the SoC (ASIC/FPGA/DSP/SW) design flow and process.
- Solid background in Cellular networks and 2G, 3G, LTE and 5G technology.
Fluent spoken and written English.